Field Programmable Gate Arrays (FPGA) are integrated circuits designed to be configured by a designer after manufacturing.  In recent years, FPGA usage has been increasing at a rapid pace, as their capability (speed, energy efficiency, amount of logic that can fit on the chip, etc.) has come to rival ASICs.  As both the number and size of FPGA projects has increased, improving methods of cost estimation of these projects is becoming more critical for project success.

FPGA development combines aspects of both hardware development and software development.  These projects begin with architectural design and writing code in a Hardware Description Language (HDL) to describe the behavior you need it to perform.  However, an FPGA has a fixed set of resources (logic cells, memory, input/output pins, etc.), and often have real-time execution requirements that adds complexity to the project.  The code must be linked to the FPGA resources while paying attention to timing issues, which can prove a major challenge in many FPGA projects.

Certifications such as DO-254 can also be a significant cost driver.  For DO-254 levels A and B, you’ll often need multiple independent teams working on the project - one for the specification, design, coding, and simulation, and another independent teams providing verification of the requirements, running simulations, and working on HW/SW integration.  This can add very significantly to the cost.

These are just a few of the considerations when estimating FPGA development projects, before even getting into impacts of reusing code and other intellectual property, or using a “C language to gates” compiler instead of writing HDL code directly (an area of ongoing research at PRICE).  If you’re interested in learning more about our FPGA estimating capability, please contact us or leave a comment below!